Computer instructions are encoded in hardware through logic circuits. Computers are completely ignorant. In the end, they are a complicated network of logic-driven switches, even though they may hold information and function based on that information. All of them are switches-based circuits that respond to their inputs’ logic by opening and closing switches. A few logic gates are used to create state machines and storage components. Others organize buses to transport information between registers and the ALU. Others transfer data between the I/O pins. And because that is what its logic was intended to do, that behavior just so happens to correlate to retrieving instructions and carrying out calculations in accordance with a program stored in memory.
Computer instructions are just states of voltages in the circuitry. Execution of instruction simply is a state change in the voltage. The CPU has instructions (machine code or the mnemonic form known as assembly language) that are unique to that CPU type that specifies how to run a program. A CPU has a microcode, and its sole purpose is to carry out the instruction by moving data into and out of registers or memory and carrying out operations on the data (such as addition, subtraction, multiplication, division, shift, and logical operations). By directing the actual controllers located inside the CPU, it achieves this. An execution unit and an instruction decode/processing unit (IU) are components of a basic CPU (EU). The IU basically determines load/store/arithmetic/branch instructions by decoding the opcode.
Although they function at a higher level, all other computer languages must ultimately be translated into that machine language in order to function. An instruction has an opcode, which indicates the command the CPU should execute, and zero, one, or more operands, which are required for the CPU to execute the instruction. These operands may be instantaneous values, in which case they form part of the instruction, register numbers, in which case the instruction also includes the register number, or a memory location (also known as an address), in which case the instruction also includes the address. A CPU has a clear set of actions it follows when it first turns on. To put it another way, it knows how to locate the initial order to carry out. The remainder of the operating system must be transferred to and loaded into memory by that first block of code.
A CPU retrieves its first instruction from a specific address when it first starts up. The hardware of the CPU defines where that place is. For all CPUs of such type, it is the same. The processor basically executes a loop. There is an internal “finger” i.e. instruction pointer (register) that points to the current instruction. The processor fetched the current instruction. It examines it and validates it and determines what action to take. If the instruction is invalid, the processor has a pre-defined action it takes. If the instruction is valid, it carries out the actions specified by that instruction. When it finishes executing the current instruction, it increments the register to point to the next instruction and repeats the above steps. Some instructions change the register value itself and cause the processor to start fetching instructions from a completely different location. These are called branch instructions. The result of the instruction may be stored in memory, it may be the address of the next instruction, or it may be kept internally to be used as an operand for the next instruction or function call parameter/argument. Generally, there are multiple registers, and the results of several instructions can be held for future use.
The CPU executes instructions through the thread. Individual instruction sequences are referred to as threads. In other words, instructions are carried out sequentially by a CPU. Sometimes instructions are given in order, other times they are interrupted. The term “thread” refers to this line of instructions. Newer multicore CPUs can handle several threads running concurrently, whereas older/smaller CPUs can only process one instruction at a time and hence support “single-threaded” execution. Software that is multithreaded and has more threads than the CPU has cores can cause the CPU to move between the threads as needed.
Some CPUs feature two hardware threads, so while thread 1 is carrying out sequential instructions in one location, thread 2 is carrying out an entirely distinct set of instructions. Because the two threads use different registers, they are unaffected by one another. Most frequently, the software simulates many threads by first executing one program until it must pause and wait for a while, at which point it saves all the registers and launches a second program. Every thread believes that it is the only one operating, yet sometimes time stops while another thread takes over the CPU.
(Carpinelli, 2002; Smallwood et al., 2014;”Instruction decoding | Encyclopedia of Computer Science”, 2022;”Instruction set | Encyclopedia of Computer Science”, 2022)
A CPU may face functional and structural problems. An example of a functional problem is it may face security issues when executing instructions. One such issue is a denial of service, that is, an assault whose main objective is to deny access to a system to authorized users. As a reaction, system designers have made provisions to make any denial-of-service attack so burdensome that it can be quickly recognized from regular behavior and therefore prevented. The majority of users won’t experience much difficulty as a result of a thread limit, which will prevent denial of service assaults. As an alternative, a scheduling policy that is inherently more resilient to denial-of-service attacks can be used. Some structural problems CPU may face are overheating, aging, overclocking, power surge, and dust. These can be addressed by using a proper cooling system, cleaning from dust, maintaining constant voltage, and lessening the number of startup programs as well as increasing the RAM. Troubleshooting a CPU can be done from OS tools such as Windows task manager, resource monitor, and process explorer could be used to diagnose high CPU usage. (Deland-Han, n.d.; Hailperin, 2019, pp. 79–91; Computer Cpu Problems and Solutions — Refugeictsolution.com.ng, 2021)
Some of the ways CPU can be made faster and more efficient are by better scheduling algorithms, making code changes that can make many single-threaded CPU programs run hundreds of times faster in parallel, and choosing the best core or frequency that uses the least amount of energy to process the amount of job given. (Farooq et al., 2017; (Wynters, 2018; Park et al., 2020)
The difference between CPU bound and I/O bound is in terms of where the code is being executed. The degree of CPU involvement in the transactions/executions of instructions is the primary distinction between I/O bound and CPU bound systems. In the latter, the CPU must handle all I/O activities in a straightforward system with a minimum I/O control unit. In the CPU-bound category, the CPU has the burden of carrying out the transfers between the I/O device and the main memory while in the I/O bound I/O functions are largely delegated to other “smart” modules that can carry out I/O on their own with minimal intervention from the CPU. (“Input-output operations | Encyclopedia of Computer Science”, 2022)
Carpinelli, J. D. (2002, November 1). The Very Simple CPU Simulator. IEEE Xplore. https://doi.org/10.1109/FIE.2002.1157946
Computer Cpu Problems And Solutions — refugeictsolution.com.ng. (2021, February 20). https://refugeictsolution.com.ng/2021/02/20/computer-cpu-problems-and-solutions/
Deland-Han. (n.d.). Guidance for troubleshooting high CPU usage — Windows Server. Docs.microsoft.com. Retrieved June 26, 2022, from https://docs.microsoft.com/en-us/troubleshoot/windows-server/performance/troubleshoot-high-cpu-usage-guidance
Farooq, M. U., Shakoor, A., & Siddique, A. B. (2017, March 1). An Efficient Dynamic Round Robin algorithm for CPU scheduling. IEEE Xplore. https://doi.org/10.1109/C-CODE.2017.7918936
Hailperin, M. (2019). Operating systems and middleware : supporting controlled interaction (pp. 79–91). Thomson Learning, Inc.
Input-output operations | Encyclopedia of Computer Science. (2022). Retrieved 26 June 2022, from https://dl.acm.org/doi/10.5555/1074100.1074484
Instruction decoding | Encyclopedia of Computer Science. (2022). Retrieved 26 June 2022, from https://dl.acm.org/doi/10.5555/1074100.1074488
Instruction set | Encyclopedia of Computer Science. (2022). Retrieved 26 June 2022, from https://dl.acm.org/doi/10.5555/1074100.1074490
Park, J., Park, B., Lee, Y., Jo, C., & Lee, S. (2020, January 1). Performance-efficient CPU resource management algorithm on Heterogeneous multi-processor. IEEE Xplore. https://doi.org/10.1109/ICCE46568.2020.9043140
Smallwood, P., Lotfy, M., & Sanders, M. (2014). Introducing the CPU and assembly language concepts via a model instruction set architecture. Journal of Computing Sciences in Colleges, 30(2).
Wynters, E. L. (2018). Small code changes can make many single-threaded CPU programs run hundreds of times faster in parallel on a GPU using C++ AMP. Journal of Computing Sciences in Colleges, 33(3), 73–74. https://doi.org/https://dl.acm.org/doi/10.5555/3144687.3144709